Friday, August 11, 2017

AFSK modulation experiments - part 3

AFSK modulation experiments - part 3


So, Part 2 of this little journey featured our hero barking up the wrong tree a bit.  I made two mistakes.
  1. I assumed that I had to modulate the VC pin on the Si5351b with values from -3v3 .. 3v3.  That is incorrect.  The proper values for the VC pin on the Si5351b are from 0 .. 3v3.  The "typical" value is listed as VDD / 2 (IE: 1.65 volts).  I presume (see below) that this means that any modulation should be centered at 1.65 volts.
  2. I assumed that the output of my signal generator was making an AC signal.  Of course, it wasn't, as I had things wired up.  It was a DC signal.
The mistakes above led to some seriously confusing results, and some pretty bad sounding signals.

Taking a step back


I decided to do some Science, and assure that I wasn't making any more bad assumptions.  I set up a test environment on my bench so that I could try moving the VC pin between 0 .. 3v3, and see the resulting impact on the signal being generated.

I wired up my Si5351b breakout board to my STM Nucleo-L152RE.  I ran the output into my spectrum analyzer so that I could get a good look at what was happening.  I wired the VC pin to a variable DC power supply so that I could vary it carefully, and see where the signal wound up.



Test 1: Baseline without VCXO


For the first test, I wanted to just set the frequency of the Si5351b to 144.330 without using the VCXO. This test was intended to see where the Si5351b was centered, without using the VC, so I had an idea of how well calibrated it was.

Here are the relevant lines which initialized the Si5351.  I am using the Etherkit Si5351 library.

    MySi5351.set_freq(14433000000ULL, SI5351_CLK0);
    MySi5351.output_enable(SI5351_CLK0, ENABLE);

This is the result.


My spectrum analyzer is reasonably well calibrated.  The center frequency of the Si5351b came in at 144.330004 mhz.  Dang.  Not bad at all!  My little breakout board actually uses a TCXO for the oscillator, and I think that helps with the accuracy.

Test 2: VC at 0 volts

  MySi5351.set_vcxo(86598000000ULL, 40);
  // Set CLK0 to be locked to VCXO
  MySi5351.set_ms_source(SI5351_CLK0, SI5351_PLLB);
  // Tune to 144.330 MHz center frequency
  MySi5351.set_freq_manual(14433000000ULL, 86598000000ULL, SI5351_CLK0);
  MySi5351.update_status();
  MySi5351.output_enable(SI5351_CLK0, ENABLE);



OK, that did just what one would expect.  It pulled the signal down to 144.323462 mhz.  That's 6.538 khz down.  Note, I set the PPM value to "40" in the initial tests, which is the value that was in the samples in the Etherkit Si5351 library I'm using.  Diddling with the PPM value will follow.

Test 3: VC at 3.3 volts


Great, OK, that set the top end of the swing.  It's at 144.332962.  I was a little surprised that it seemed a little asymmetric.   It's only 2.962 khz above the center (vs the 6,538 below we saw).

Test 4: VC at 1.65 volts


OK, this one, I would expect should show the signal centered up again.


Ruh Roh.  We should be at 144.330.  We're at 144.327212.   That's about 5khz off where I expected. Not cool.  If I split the difference between the low and high values, I should have been at 144.328212, which would still have been 1.788 khz off.

Test 5: What voltage do I need for Center frequency?




OK, I was able to get it centered up.  Rather than being at 1.65 volts, I had to apply 2.43 volts. Curious.

Test 6: How does modulation look at 1.65 volts with the DAC?


So, my DAC was all set up to make about 1 volt P2P, centered at 1.65 volts.  I put that 1200 hz modulation into the VC pin to see what it would look like,


Sure enough, it looks symmetric around 133.327 mhz, the same as when the VC pin is just held at 1.65 volts.



Other thoughts on the frequency error

In a later test, I had the VCXO set at 146.000 mhz.  When set up that way, the frequency was dead nuts on at 1.65 volts.  Modulating the frequency looked just fine, too.

I suspect that the frequency error has something to do with an error introduced by the multisynth multipliers and dividers.  I'm not too concerned, as I may be able to address it either by using the calibration subroutines, or different multipliers.

Deviation and the PPM value

OK, so I had set the PPM value in all of these tests to 40.  At 144.330 mhz, that should make for a deviation of  3.608 khz.  My observed deviation was 144.332962 - 144.323462 = 9.500 khz,  

Hmm...   Is that how you measure deviation?  If so, mine's WAY too big.

Test 7:  Different PPM values



PPM value 0 volt reading 3.3 volt reading Delta
30 144.325164 mhz 144.332289 mhz 7,127 hz
40 144.323462 mhz 144.332962 mhz 9,500 hz

I also tried a test with 20 PPM (which isn't supported according to the documentation), and it seemed to show the same readings as 30 PPM.

If I understand "deviation" in this context, I think these numbers are too big.  I need to understand this better.

Next steps


Strictly speaking, the frequency being off isn't too much of a problem.  The Si5351 has a calibration routine which I can use to center this up.  It's just odd that the center frequency is different when using the VCXO.  I'm a little more concerned about the deviation right now.  The lowest deviation setting still seems to be too wide, unless I'm misunderstanding what to expect with regard to this kind of experiment.

Things to do:
  1. Call the calibration routine to see if I can get it centered up.
  2. Experiment with the amplitude of the VC signal to see the effect on the signal, and received modulation.
  3. See if different multipliers work to improve the frequency accuracy of the VCXO.  I used 6 for these tests.   I could try 4 or 8




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